74 - NHR PerfLab Seminar 2024-10-29: (Co-)designing a European CPU for HPC/AI [ID:55669]
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Okay, thank you very much. So as Georg just mentioned, if someone of you know me, will

know me from my time in Jülich, at the Jülich Supercomputing Center mostly. Since about

one month ago, I'm working in a sabbatical at Cypro, because I always wanted to see how

processes are actually built in real life in industry. So especially processes for HPC,

that is the field that I am in. And therefore, this presentation is a little bit of a mixture

of work we've been doing from the Jülich side in cooperation with Cypro, also worked

on by Cypro themselves, with contributions from a bunch of people that you see here acknowledged

on the first slide. So my idea is to, so I'm just new to the company, so I'm learning a

bit how it works inside and trying to present you what I've learned until now on how processors

are being built. So I will basically just start with the motivation, why at all building,

doing like this in Europe, which kind of chip should we build? What are the performance trends

that we see? And then what it means developing a CPU for production. Then I have some material

on co-design we've been doing using M5 from the team at Jülich and within the European

Processor Initiative. And then come to the architecture of the first CPU developed by

Cypro and then lessons learned. So why do we actually want, and we think it's important

to build such a chip in Europe? So if you look into the supercomputing industry from

the EU perspective, you realize that about one third of the facilities of the consumers

of HPC resources are in Europe, but there's only about one-twentieth of the equipment

that is provided by Europe and it's actually zero percent of the processing units that

are being developed in Europe. You might say, wait, why is this a problem? So the problem

is that if we don't have home-grown technology, at some point we become something like a digital

colony. So we need to be able to have this expertise. And I know that people here in

Erlangen have been working from the academic side for many years developing processors,

but I think it's also important to have products out there you can then employ in our edge

business systems. So with this reasoning around 2018, the European Euro HPC joint undertaking

started and this is a kind of association where the European Commission and many countries

in Europe joined together efforts and funding to both deploy HPC systems and also develop

technologies with hardware and software for those systems. And very soon afterwards, this

European Processor Initiative, this European funded project started with all the partners

you see there on the right. The coordination is taken by Eviden and then there are many

other partners, industrial and academic partners, that are involved in two lines of development.

On the one hand side is an ARM-based CPU and on the other side a RISC-5 based accelerator,

actually several accelerators. What was clear within the project is that if this has, if

this shall become a product, something you can put into the market and sell and productize,

there needs to be a company that drives it. And that's where the idea of Cypher actually

came from. It was around it from within the European Processor Initiative. But before going

there, so the first question is which kind of chip do you want to build in Europe? And there are,

of course, several options. So you could, first of all, you need to decide how to do it. So what

kind of market you want to address and which is the time horizon in which this has to be done.

The first target was decided to be HPC. So as I said, this came from the Euro HPC

Yarn Initiative, the original funding source. Of course, also AI. Let's say four years ago AI

was not such a big topic, but now it is definitely. And the idea was to have something like within

five years time range, have something on the hand you can then put in a computer, which is very,

very, very ambitious if you are speaking about a real full-fledged CPU for HPC. Which kind of device

then one could decide to build a GPU. But then there's a question, can you actually compete

starting from a startup, from a small company with the domain, the dominating company in the

market, which is Nvidia, now a little bit also AMD. Furthermore, all the designs are closed source.

There are no licensable solutions for GPUs. You can then go for a CPU where there are virus

providers for ISAS. The software is also well established and there is a wider market out there.

But you could think about building some specific accelerators, for example, an AI accelerator. But

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NHR@FAU PerfLab Seminar

Zugänglich über

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Dauer

00:42:10 Min

Aufnahmedatum

2024-10-29

Hochgeladen am

2024-12-02 10:36:07

Sprache

en-US

Speaker: Prof. Dr. Estela Suarez from SiPEARL
Abstract:
 Developing high-end processors for the HPC and AI markets is an extremely complex and high-risk endeavor, requiring both large economic investments and a wide range of complementary expertise. For the first time in more than two decades, this challenge is being tackled in Europe, with technological sovereignty as a key objective. SiPEARL’s Arm-based Rhea product line aims to deliver high application efficiency with CPUs characterized by a design balancing memory bandwidth and computing power. The development of Rhea started within the EPI project, a European-funded research project with more than 30 partners, in which the Jülich Supercomputing Centre played a leading role in co-design activities. In this talk, we will present the motivation behind and the path towards the first generation of HPC-oriented CPU designs in Europe, as well as our experience in co-design at processor level, based on gem5 simulations of the chip architecture. We will discuss examples of our gem5 studies, present the Rhea architecture, and share some of the experiences gathered in the interaction between modeling experts and chip designers.
Date and time: Tuesday, October 29, 2024, 2 p.m. – 3 p.m.
Short bio:
 Prof. Dr. Estela Suarez is Senior Principal Solution Architect at SiPEARL. She took this role in September 2024, taking a sabbatical from her positions as Joint Lead of the department Novel System Architecture Design at the Jülich Supercomputing Centre and Associate Professor for High Performance Computing at the University of Bonn. Her expertise is in HPC system architecture and codesign. As leader of the DEEP project series, she has driven the development of the Modular Supercomputing Architecture, including the implementation and validation of hardware, software, and applications. In addition, she has been leading the codesign efforts within the European Processor Initiative since 2018. She holds a Master’s degree in Astrophysics from the University Complutense of Madrid (Spain) and a PhD in Physics from the University of Geneva (Switzerland).
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